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VLSI STA Courses

VLSI STA

Edusaksham has launched a new product for those who wants to crack "Static Timing Analysis" (STA) Interview. This program is designed to help VLSI aspirants understand the basic and advance concepts required for Semiconductor Industry. It will help them identify their strength and areas of improvements to re-build their concepts. 

15 papers related to "Static Timing Analysis" which helps in building fundamentals and concepts.

Duration

- Validity of Assessment tool is for 1 year from the date of enrollment

Certification

Certificate of Completion

Key Features

  • Papers based on Basics to Advanced STA concepts
  • 15 Practice papers
  • Innovative Assessment tool
  • Detailed Analytics  
  • Identification of strong and weak area

Who can attend

  • B. Tech (3rd & 4th-year students)
  • M. Tech (1st & 2nd-year  students)
  • Professionals with 0-4 years of experience or anyone who wants to build strong  conceptual knowledge 

 Assessment Tool:

  • Practice Paper: 15 papers
  • Topics covered:
    • Delay, Timing concepts, Timing Arc, Timing path and exceptions, Timing checks, Setup and Hold Time, Setup and Hold Violation
  • Analytical report

VLSI - STA++

Static Timing Analysis ++ program is designed to help VLSI aspirants understand the basic and advance concepts required for Semiconductor Industry. It will help them identify their strength and areas of improvements to re-build their concepts. An innovative assessment technique along with personalized online classes is a unique feature for VLSI Job Aspirants.

Duration: (10 weeks program)

- 40 Hours online classes
- Validity of Assessment tool is for 1 year from the date of enrollment

Certification

Certificate of Completion: After completion of online classes

Key Features

  • 40 hours online classes
  • Guest classes by Industry person
  • Basics to Advanced STA concepts
  • Interactive Sessions
  • Discussion on Timing projects
  • 15 Practice papers
  • Innovative Assessment tool
  • Re-attend missing online classes
  • Certificate of Completion
  • 100% Placement Assistance

Training Delivery Model

Interactive online classes for 40 hours with emphasis on regular assessment and personalized feedback

Who can attend

  • B. Tech (3rd & 4th year students)
  • M. Tech (1st & 2nd year  students)
  • Professionals with 0-4 years of experience or anyone who wants to build their conceptual knowledge strong

Course Content

Module 1: Timing Paths

  • False and multi-cycle path concepts along with another type of Timing paths

Module 2: Timing Arc

  • Different type of Timing Arc
  • How to read the different information from Timing Libraries

Module 3: Delay

  • Cell Delay / Net Delay
  • Wire Load Model
  • Transition Delay / Propagation Delay
  • Delay calculation in Path Base analysis vs. Graph Base Analysis
  • Different type of Min and Max Delay calculation
  • Introduction of SDF
  • Delay because of Parasitic (RC)
  • Delay calculation based on SPEF file
  • NLDM (Non-Linear Delay Model)
  • CCS timing library Delay concepts
  • How delay changes because of different operating conditions, PVT corners, and RC corners?

Module 4: Setup and Hold Time / Violation

  • Basic Concepts and terminology (Launch/Capture paths, Slack)
  • In different circuits, how to calculate the timing Violations
  • How to calculate Setup and hold time of a system/macro
  • Path basis analysis vs. Graph-based analysis
  • OCV / AOCV basis analysis
  • PVT corner based analysis
  • How to solve Timing violations
  • Effect of Drive strength
  • Effect of size of gate or Net
  • Fan-out/Fan-In
  • Adding or removing buffer
  • Placement of the gate

Module 5: Timing Models

  • Basic understanding of QTM / ILM / ETM
  • Basic understanding of Hyper scale models (Advance Timing technique)

Module 6: Clocks

  • Different terminologies (Clock Period, Latency, Virtual Clock, Generated Clock, Uncertainty, Jitter)
  • Synchronous vs. Asynchronous Clocks
  • Clock Gating
  • How to generate different type of generated clocks (like divide by 2 and all)
  • Clock Skew

Module 7: Clock Network

  • Clock Mesh
  • Different configuration,
  • Advantage and disadvantage
  • Clock Tree
  • Different type of tree
  • Advantage and Disadvantage

Module 8: SI Effect

  • Effect of Crosstalk on Timing analysis
  • What's the cross talk
  • Reasons of cross talk

Module 9: Parasitic Extraction

  • Only those concepts, which are important from the timing perspective.
  • Different type of caps (Coupling cap, fringe cap), Shielding effect, Metal fill (dummy metal)
  • Net Delay, Transition Delay

Module 10: ECO concepts

  • Why it's required?
  • How usually it is done?
  • What’s the advantage and disadvantage of this?

Module 11: DMSA

  • Multi-Scenario Analysis
  • What is multi Scenario
  • What's the importance
  • Distributed Analysis
  • DMSA
  • Challenges
  • Advantage
  • How to read reports
  • Special Variables
  • Effect on constraint generation or analysis or reporting

Module 12: Other Concepts

  • OCV (On Chip Variation)
  • AOCV (Advance On-Chip Variation)
  • How to set derting (globally, locally)
  • Clock Re-convergence Pessimism Removal (CRR and CRPR)

Assessment Tool (Includes all features of STA):

  • Practice Paper: 15 papers
  • Topics covered:
    • Delay, Timing concepts, Timing Arc, Timing path and exceptions, Timing checks, Setup and Hold Time, Setup and Hold Violation
  • Analytical report

About Trainer:

Puneet VLSI

Testimonials - VLSI

 

Rohith Talwar1

 

Getting trained from normal lectures is different and lectures from an industry expert are very different so I'd like to take this chance to thank you for giving such a remarkable lectures. I'm grateful for your patience for everything whether it may be subjective or general discussion and efforts you put in the class. You have unique teaching style in which you used stuff from different sources and combined to a simplified version, thank you for facilitating this classes and for your encouragement at times when I felt discouraged. It is a great pleasure to be your student with all your patience and understanding. So I hope that you'd  continue to be inspiring because I have learned a lot of things from you. - Rohith Talwar - Final Year, B.Tech, JBIET

 

 

Shilpa VLSI

 

Even though I am a Physical Design diploma holder, it was not that easy to get a job in the semiconductor Industry. I pursued my goal through EduSaksham's program. I got to know about the program through one of my friends. I bought one of their product about STA. It was really good and worth to study. Apart from that, they helped me a lot to transform my dream of getting a job in Semiconductor domain into a reality. Now, I got placed in Blackpepper Technologies Pvt. Ltd. and working in client location. Thank you so much for your great work and dedication towards us. - Silpa Pushpan, B.Tech, College of Engineering Poonjar, Kottayam Kerala

 

 

 

Anjali Arora

 

I want to thank from the bottom of my heart to Mr. Puneet Mittal for his guidance and support which help me to crack interview in ARM. Static Timing Analysis is very important part of VLSI Design. His training methodology has helped me to make my STA concept & foundation strong,  which is much needed for an interview. He cleared every doubt properly. If you write that you know STA then obviously interviewer will be going to ask Setup & Hold time (not only definition but much in depth). Like how to remove Setup violations and how to decrease delay. He taught me 10 different ways to do all these. But Interviewer wants only one. The Interviewer must be impressed if you know things like this. - Anjali Arora - M.Tech, Indira Gandhi Delhi Technical University

 

 

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This course can be a one stop solution to all the MS students who are aspiring to get into VLSI industry. My wait for a good resource to get a strong hold on VLSI fundamentals has finally come to an end with an outstanding course, SMP+, from Edusaksham. 
The way Instructor explains complex concepts in a simplified way with examples and analogies truly deserves appreciation. Each online test helps to understand the concepts in depth and takes the learning experience to the next level.  - Praveen - M.S., U C Berkeley

 

 

Priyanka Ruhil

You must be thinking is it worth the money? Yes! It definitely is. Being a student of instrumentation, it was always a dream to be a part VLSI industry. But EduSaksham, through its tremendous efforts helped me in getting an internship in Cadence. VLSI- Self Mentorship Program comprised of a lot of information in form of lectures, assessments, webinars, test papers, even the information related to semiconductor industries. And the best part about the course is its test series. These test papers are actually designed with diversified difficulty levels covering almost every topic from digital circuits, timing, delays, and CMOS in a very effective manner. And obviously, getting taught by an expert of STA is a perk itself. My personal experience with this program was way more than informative and splendid. I forgot to mention it you ( Mr. Puneet Mittal ) are a wonderful teacher. - Priyanka Ruhil, 3rd Year, Instrumentation Branch, YMCA University Of Science And Technology, Faridabad

 

 

Anindita

I want to express my sincere thanks to Puneet Mittal sir for mentoring me and helping me to understand the VLSI concepts in depth and upto the mark of  industrial standards. I had enrolled for the "Self Mentorship Program"  conducted by EDUSAKSHAM Team which is headed by Puneet Sir. The webinar course helped me to clarify the Concept of Static Timing Analysis and Physical Design in more details. Also, his excellent support and guidance in writing resume and assistance in approaching in a right way while preparing for interviews paved my way in cracking the technical rounds and interviews in an efficient manner and ultimately getting a good job in the VLSI Industry. - Anindita Nayak (Digital design engineer at Peaksense Technologies Pvt Ltd)

 

 

Utkarsh

In spite of having basic knowledge about layout, digital, analog etc. and having an exposure to Cadence Virtuoso, Getting an opportunity for an interview was a major problem for me due to my degree of B.Tech and not being from a very good college. Searching for different opportunities on Linkedin I came across Puneet Sir. I have learned basic STA from his blog VLSI EXPERT. I messaged him and requested for his help, He simply asked me to solve some Edusaksham's assessment papers. He guided me on my resume enhancement, took frequent interviews, and asked me to rectify my mistakes. It is due to his efforts that I got a chance in Gatelength Technologies. I want to thank Puneet sir for his guidance and mentorship, you are the reason because of whom students like me who are not of Tier A colleges end up getting placed in the core. It is you sir because of whom I could see my future bright. - Utkarsh Arora (IO Layout Engineer at GateLength Technology Pvt Ltd)

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