Foundation of VLSI Design - Self Mentorship Program
Duration
1 Year
Categories
VLSI
Course Overview
Foundation of VLSI Design (Self Mentorship Program) is designed to help VLSI aspirants understand the basic and advance concepts required for Semiconductor Industry. An innovative assessment technique blended with learning videos and conceptual notes will help re-build their concepts and identify their strength and areas of improvements.
The program is aimed to provide the best of self paced learning material required to excel in VLSI Industry. The objective of the course is to make aspirants aware about different fields in VLSI Domain and help them prepare better for the industry.
Foundation of VLSI Design (Self Mentorship & Program)
- Video-based learning
- 80 Practice Paper
- 20 Certification Paper
- Online Assessment tool Read More
- Industry-centric questions
- Self Paced Learning
- Self Explantary Answers
- Certificate of Complition
Static Timing Analysis
- Online Assessment tool
- 15 Practice Paper Read More
- Self Paced Learning
- Self Explantary Answers
Curriculum
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Module 1: Advance Digital Concepts
Significance of Multiplexer, Designing of different logic gates, Sequential Gates using MUX Flip-flop, Latches basic concepts -
Module 2: Advance CMOS Concepts
Fundamental of CMOS: Working of CMOS, characterization curve, Effect of different parameters like threshold voltage, doping level, Tox, W/L ratio
CMOS fabrication: Different configuration of CMOS, NMOS and PMOS fabrication technique, Nwell, Twin Well, Pwell, CMOS layout
CMOS circuit: Designing of different Logic Gates using NMOS, PMOS, CMOS, Designing of complex circuits using CMOS, Transmission Gate (NMOS, PMOS, CMOS), PASS transistor, Different circuits using PASS transistor -
Module 3: Semiconductor Fabrication
Importance of PN Junction
Importance carrier charge mobility
Band Diagram of Intrinsic and Extrinsic Semiconductors
Different type of regions N-type, P-type, N+/N++, P+/P++ in Semiconductor devices
Different type of Capacitance across Junctions -
Module 4: Parasitic Extraction (RC circuits)
Metal layer, Metal Stack, Manufacturing effects, Technology file, Metal variation
Different type of caps (Coupling cap, fringe cap), Shielding effect, Metal fill (dummy metal) -
Module 5: Static Timing Analysis
Delay: Net delay, propagation delay, Transition delay, Delay table, Cell delay, Non-Linear-DelayModel (NLDM)
Timing Path and Exceptions: False path, Multi-cycle path, Data path, Clock path, Launch path, Capture path
Timing Arc: Timing arc concepts, positive unate, negative unate, non unate
Timing Checks: Setup and Hold Check, Removal and Recovery, Max pulse width
Setup and Hold Time: Setup and hold concepts, Global setup and hold time
Setup and Hold Violations: Slew, slack, setup and hold violation concepts, how to fix setup and hold Violations -
Module 6: Introduction to VLSI Design Flow
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Module 7: Layout Basic
Introduction to different layers in the fabrication of device (Metal, Alucap, oxide
Layout Design Rules
o Layer Concepts
o Design Rules
Assessment Tool
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Practice Papers :
80 papers
Around 2000+ questions
Multiple attempts
No time limit to solve paper
Analytics reports
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Topics covered:
Digital electronics: Number System, Logic gates, Combinational Circuit, Sequential Circuit, State Machine
Semiconductor Physics: Semiconductor Theory, Semiconductor Physics
RC Circuits: Electrical characteristic, RC circuits
CMOS Concepts: CMOS fundamental, CMOS fabrication, CMOS circuit
Timing Concepts: Delay, Timing concepts, Timing Arc, Timing path and exceptions, Timing checks, Setup and Hold Time, Setup and Hold Violation
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Certification Program:
10 days (20 papers)
Industry Standard papers and questions
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